Sub-100 nm MOSFET fabrication with low temperature resist...

Sub-100 nm MOSFET fabrication with low temperature resist trimming process

Shajan Mathew, Ranganathan Nagarajan, L.K. Bera, Feng Han Hua, Du An Yan, N. Balasubramanian
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Volume:
462-463
Year:
2004
Language:
english
Pages:
4
DOI:
10.1016/j.tsf.2004.05.021
File:
PDF, 420 KB
english, 2004
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