An area-efficient timing closure technique for FPGAs using...

Integration, the VLSI Journal 2007 Vol. 40; Iss. 2

An area-efficient timing closure technique for FPGAs using Shannon's expansion

Deshanand P. Singh, Stephen D. Brown
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Volume:
40
Year:
2007
Language:
english
Pages:
7
DOI:
10.1016/j.vlsi.2006.02.009
File:
PDF, 316 KB
english, 2007
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