Multiple-cell square-type layout design for output...

Solid-State Electronics 1998 Vol. 42; Iss. 6

Multiple-cell square-type layout design for output transistors in submicron CMOS technology to save silicon area

Ming-Dou Ker, Chung-Yu Wu, Chien-Chang Huang, Tung-Yang Chen
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Volume:
42
Year:
1998
Language:
english
Pages:
8
DOI:
10.1016/s0038-1101(98)00112-9
File:
PDF, 1.28 MB
english, 1998
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