Graded channel architecture: the solution for misaligned DG...

Semiconductor Science and Technology 2008 / 07 Vol. 23; Iss. 7

Graded channel architecture: the solution for misaligned DG FD SOI n-MOSFETs

Sharma, Rupendra Kumar, Gupta, Ritesh, Gupta, Mridula, Gupta, R S
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Volume:
23
Language:
english
Journal:
Semiconductor Science and Technology
DOI:
10.1088/0268-1242/23/7/075041
Date:
July, 2008
File:
PDF, 385 KB
english, 2008
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