High-performance logic transistor DC benchmarking toward 7nm technology-node between III–V and Si tri-gate n-MOSFETs using virtual-source injection velocity model
Baek, Rock-Hyun, Kim, Jin Su, Kim, Do-Kywn, Kim, Taewoo, Kim, Dae-HyunVolume:
116
Language:
english
Journal:
Solid-State Electronics
DOI:
10.1016/j.sse.2015.11.031
Date:
February, 2016
File:
PDF, 646 KB
english, 2016