Analytical modeling of CMOS circuit delay distribution due...

Solid-State Electronics 2006 Vol. 50; Iss. 7-8

Analytical modeling of CMOS circuit delay distribution due to concurrent variations in multiple processes

B.P. Harish, Navakanta Bhat, Mahesh B. Patil
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Volume:
50
Year:
2006
Language:
english
Pages:
9
DOI:
10.1016/j.sse.2006.07.005
File:
PDF, 283 KB
english, 2006
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