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Volume 40; Issue 2
Main
Microelectronic Engineering
Volume 40; Issue 2
Microelectronic Engineering
Volume 40; Issue 2
1
Numerical simulation of creation-passivation kinetics of interface traps in irradiated n-channel power VDMOSFETs during thermal annealing with various gate biases
Goran S. Ristić
,
Momčilo M. Pejović
,
Aleksandar B. Jakšić
Journal:
Microelectronic Engineering
Year:
1998
Language:
english
File:
PDF, 164 KB
Your tags:
english, 1998
2
A reliability comparison of RTO and furnace thin SiO2 layers: effect of the oxidation temperature
L Fonseca
,
F Campabadal
,
B Garrido
,
J Samitier
Journal:
Microelectronic Engineering
Year:
1998
Language:
english
File:
PDF, 341 KB
Your tags:
english, 1998
3
Simple simulation of electron-beam lithography for fabricating sub-0.2 μm T-shaped gates based on a two-layer resist system
D Xu
Journal:
Microelectronic Engineering
Year:
1998
Language:
english
File:
PDF, 629 KB
Your tags:
english, 1998
4
An anisotropic U-shaped SF6-based plasma silicon trench etching investigation
A Burtsev
,
Y.X Li
,
H.W Zeijl
,
C.I.M Beenakker
Journal:
Microelectronic Engineering
Year:
1998
Language:
english
File:
PDF, 558 KB
Your tags:
english, 1998
5
Study of recoil implantation technique for deep low doped junction formation with aluminum
P Godignon
,
E Morvan
,
J Montserrat
,
X Jordá
,
M Vellvehi
,
S Hidalgo
,
J Rebollo
Journal:
Microelectronic Engineering
Year:
1998
Language:
english
File:
PDF, 372 KB
Your tags:
english, 1998
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