IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

1

Error Detection and Recovery for ECC: A New Approach Against Side-Channel Attacks

Ma, Kun, Wu, Kaijie

Journal:

Year:

2014

Language:

english

File:

PDF, 482 KB

english, 2014

2

Accelerated Performance Evaluation of Fixed-Point Systems With Un-Smooth Operations

Parashar, Karthick Nagaraj, Menard, Daniel, Sentieys, Olivier

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 560 KB

english, 2014

3

Multibit Retention Registers for Power Gated Designs: Concept, Design, and Deployment

Chen, Yu-Guang, Geng, Hui, Lai, Kuan-Yu, Shi, Yiyu, Chang, Shih-Chieh

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.23 MB

english, 2014

4

Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing

Liu, Wen-Hao, Li, Yih-Lang

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.10 MB

english, 2014

5

Reachability-Based Robustness Verification and Optimization of SRAM Dynamic Stability Under Process Variations

Song, Yang, Yu, Hao, DinakarRao, Sai Manoj Pudukotai

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 957 KB

english, 2014

6

Characterizing VeSFET-Based ICs With CMOS-Oriented EDA Infrastructure

Qiu, Xiang, Marek-Sadowska, Malgorzata, Maly, Wojciech P.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.12 MB

english, 2014

7

Input Test Data Volume Reduction for Skewed-Load Tests by Additional Shifting of Scan-In States

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 410 KB

english, 2014

8

Mixed-Crossing-Avoided Escape Routing of Mixed-Pattern Signals on Staggered-Pin-Array PCBs

Kan Wang,, Sheqin Dong,, Huaxi Wang,, Qian Chen,, Tao Lin,

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.76 MB

english, 2014

9

Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation

Flach, Guilherme, Reimann, Tiago, Posser, Gracieli, Johann, Marcelo, Reis, Ricardo

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 770 KB

english, 2014

10

Variation-Aware Geometric Programming Models for the Clock Network Buffer Sizing Problem

Rakai, Logan, Farshidi, Amin, Westwick, David, Behjat, Laleh

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 846 KB

english, 2014

11

On the Deployment of On-Chip Noise Sensors

Wang, Tao, Zhang, Chun, Xiong, Jinjun, Shi, Yiyu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 788 KB

english, 2014

12

Latency Analysis for Sequential Circuits

Finder, Alexander, Sulflow, Andre, Fey, Gorschwin

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 127 KB

english, 2014

13

PushPull: Short-Path Padding for Timing Error Resilient Circuits

Yang, Yu-Ming, Jiang, Iris Hui-Ru, Ho, Sung-Ting

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.40 MB

english, 2014

14