IEEE Transactions on Very Large Scale Integration (VLSI) Systems

1

Statistical Functional Yield Estimation and Enhancement of CNFET-Based VLSI Circuits

Ghavami, Behnam, Raji, Mohsen, Pedram, Hossein, Pedram, Massoud

Journal:

Year:

2013

Language:

english

File:

PDF, 2.00 MB

english, 2013

2

Novel MIMO Detection Algorithm for High-Order Constellations in the Complex Domain

Mahdavi, Mojtaba, Shabany, Mahdi

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.85 MB

english, 2013

3

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

Karmakar, Supriya, Chandy, John A., Jain, Faquir C.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.45 MB

english, 2013

4

Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation

Todri, Aida, Bosio, Alberto, Dilillo, Luigi, Girard, Patrick, Virazel, Arnaud

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.95 MB

english, 2013

5

Current-Comparison-Based Domino: New Low-Leakage High-Speed Domino Circuit for Wide Fan-In Gates

Peiravi, Ali, Asyaei, Mohammad

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 673 KB

english, 2013

6

Subthreshold Dual Mode Logic

Kaizerman, Asaf, Fisher, Sagi, Fish, Alexander

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 574 KB

english, 2013

7

Symbolic Moment Computation for Statistical Analysis of Large Interconnect Networks

Hao, Zhigang, Shi, Guoyong, Tan, Sheldon X.-D., Tlelo-Cuautle, Esteban

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 937 KB

english, 2013

8

Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout

Kim, Dae Hyun, Athikulwongse, Krit, Lim, Sung Kyu

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.88 MB

english, 2013

9

Unified Capture Scheme for Small Delay Defect Detection and Aging Prediction

Jin, Song, Han, Yinhe, Li, Huawei, Li, Xiaowei

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 984 KB

english, 2013

10

Architecture for Real-Time Nonparametric Probability Density Function Estimation

Fahmy, Suhaib A., Mohan, A. R.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.58 MB

english, 2013

11

Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow

Eissa, Haitham, Salem, Rami Fathy, Arafa, Ahmed, Hany, Sherif, El-Mously, Abdelrahman, Dessouky, Mohamed, Nairn, David, Anis, Mohab

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.20 MB

english, 2013

12

Theoretical Modeling of Elliptic Curve Scalar Multiplier on LUT-Based FPGAs for Area and Speed

Roy, Sujoy Sinha, Rebeiro, Chester, Mukhopadhyay, Debdeep

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 551 KB

english, 2013

13

Reduced-Complexity LCC Reed–Solomon Decoder Based on Unified Syndrome Computation

Zhang, Wei, Wang, Hao, Pan, Boyang

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 803 KB

english, 2013

14

Power Network Optimization Based on Link Breaking Methodology

Jakushokas, Renatas, Friedman, Eby G.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 619 KB

english, 2013

15

1.2-mW Online Learning Mixed-Mode Intelligent Inference Engine for Low-Power Real-Time Object Recognition Processor

Oh, Jinwook, Lee, Seungjin, Yoo, Hoi-Jun

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.54 MB

english, 2013

16

High-Throughput 0.13-$\mu{\rm m}$ CMOS Lattice Reduction Core Supporting 880 Mb/s Detection

Shabany, Mahdi, Youssef, Ameer, Gulak, Glenn

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.79 MB

english, 2013

17

Design of Hardware Function Evaluators Using Low-Overhead Nonuniform Segmentation With Address Remapping

Hsiao, Shen-Fu, Ko, Hou-Jen, Tseng, Yu-Ling, Huang, Wen-Liang, Lin, Shin-Hung, Wen, Chia-Sheng

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.01 MB

english, 2013

18

C-Based Complex Event Processing on Reconfigurable Hardware

Inoue, Hiroaki, Takenaka, Takashi, Motomura, Masato

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 528 KB

english, 2013

19