Volume 6; Issue 1

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IEEE Transactions on Very Large Scale Integration (VLSI)...
Volume 6; Issue 1

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volume 6; Issue 1

1

SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design

Gajski, D.D., Vahid, F., Narayan, S., Jie Gong

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 281 KB

english, 1998

2

Sampling phase detector using a resonant tunneling high electron mobility transistor for microwave phase-locked oscillators

Okazaki, H., Nakagawa, T., Muraguchi, M., Fukuyama, H., Maezawa, K., Yamamoto, M.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 77 KB

english, 1998

3

Efficient semisystolic architectures for finite-field arithmetic

Jain, S.K., Song, L., Parhi, K.K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 464 KB

english, 1998

4

A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's

Campbell, P.M., Greub, H.J., Garg, A., Steidl, A., Carlough, S., Ernest, M., Philhower, R., Maier, C., Kraft, R.P., McDonald, J.F.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 109 KB

english, 1998

5

A CORDIC processor for FFT computation and its implementation using gallium arsenide technology

Sarmiento, R., de Armas, V., Lopez, J.F., Montiel-Nelson, J.A., Nunez, A.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 514 KB

english, 1998

6

Efficient retiming of large circuits

Maheshwari, N., Sapatnekar, S.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 309 KB

english, 1998

7

On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard

Aberbour, M., Houelle, A., Mehrez, H., Vaucher, N., Guyot, A.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 241 KB

english, 1998

8

The use of nanoelectronic devices in highly parallel computing systems

Fountain, T.J., Duff, M.J.B., Crawley, D.G., Tomlinson, C.D., Moffat, C.D.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 136 KB

english, 1998

9

A novel design of a two operand normalization circuit

Antelo, E., Boo, M., Bruguera, J.D., Zapata, E.L.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 109 KB

english, 1998

10

Overview of complementary GaAs technology for high-speed VLSI circuits

Brown, R.B., Bernhardt, B., LaMacchia, M., Abrokwah, J., Parakh, P.N., Basso, T.D., Gold, S.M., Stetson, S., Gauthier, C.R., Foster, D., Crawforth, B., McQuire, T., Sakallah, K., Lomax, R.J., Mudge, T

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 102 KB

english, 1998

11

Fast fault translation

Vinnakota, B., Andrews, J.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 239 KB

english, 1998

12

Mixed signal integrated circuits based on GaAs HEMTs

Thiede, A., Zhi-Gong,, Schlechtweg, M., Lang, M., Leber, P., Zhihao Lao,, Nowotny, U., Hurm, V., Rieger-Motzer, M., Ludwig, M., Sedler, M., Kohler, K., Bronner, W., Hornung, J., Hulsmann, A., Kaufel

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 297 KB

english, 1998

13

A dynamically reconfigurable interconnect for array processors

John, L.K., John, E.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 180 KB

english, 1998

14

Accurate area and delay estimation from RTL descriptions

Srinivasan, A., Huber, G.D., LaPotin, D.P.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 129 KB

english, 1998

15

Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's

Guerra, L.M., Potkonjak, M., Rabaey, J.M.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 175 KB

english, 1998

16

Maximum power estimation for CMOS circuits using deterministic and statistical approaches

Chuan-Yu Wang,, Roy, K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 226 KB

english, 1998

17

Statistical estimation of average power dissipation using nonparametric techniques

Li-Pen Yuan,, Chin-Chi Teng,, Sung-Mo Kang,

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 281 KB

english, 1998

18

Architectural optimization for low-power nonpipelined asynchronous systems

Plana, L.A., Nowick, S.M.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 246 KB

english, 1998

19

Dynamic fault dictionaries and two-stage fault isolation

Ryan, P.G., Kent Fuchs, W.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 116 KB

english, 1998

20

Minimizing the complexity of SRT tables

Oberman, S.F., Flynn, M.J.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1998

Language:

english

File:

PDF, 215 KB

english, 1998