Volume 2017

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VLSI Design
Volume 2017

VLSI Design

Volume 2017

1

State-Transition-Aware Spilling Heuristic for MLC STT-RAM-Based Registers

Ni, Yuanhui, Gong, Zhiyao, Chen, Weiwen, Yang, Chengmo, Qiu, Keni

Journal:

Year:

2017

Language:

english

File:

PDF, 1.41 MB

english, 2017

2

Comparative Power Analysis of an Adaptive Bus Encoding Method on the MBUS Structure

Yang, X., Wu, N., Andrian, J. H.

Journal:

Year:

2017

Language:

english

File:

PDF, 1.66 MB

english, 2017

3

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips

Charif, Amir, Coelho, Alexandre, Zergainoh, Nacer-Eddine, Nicolaidis, Michael

Journal:

Year:

2017

Language:

english

File:

PDF, 1.66 MB

english, 2017

4

Corrigendum to “High-Accuracy Programmable Timing Generator with Wide-Range Tuning Capability”

Chu, Ting-Li, Yu, Sin-Hong, Hwang, Chorng-Sii

Journal:

Year:

2017

Language:

english

File:

PDF, 1.15 MB

english, 2017

5

Oscillation-Based Test Applied to a Wideband CCII

Petrashin, Pablo, Toledo, Luis, Lancioni, Walter, Osuch, Piotr, Stander, Tinus

Journal:

Year:

2017

Language:

english

File:

PDF, 1.64 MB

english, 2017

6

Chebyshev Bandpass Filter Using Resonator of Tunable Active Capacitor and Inductor

Wang, Yu, Chen, Jian, Chen, Chien-In Henry

Journal:

Year:

2017

Language:

english

File:

PDF, 4.27 MB

english, 2017