Volume 20; Issue 5

IEEE Design & Test of Computers

Volume 20; Issue 5

1

An on-chip self-repair calculation and fusing methodology

Anand, D., Cowan, B., Farnsworth, O., Jakobsen, P., Oakland, S., Ouellette, M.R., Wheater, D.L.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 299 KB

english, 2003

2

Obtaining high defect coverage for frequency-dependent defects in complex ASICs

Madge, R., Benware, B.R., Daasch, W.R.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 356 KB

english, 2003

3

IEEE 1149.6: a boundary-scan standard for advanced digital networks

Eklow, B., Parker, K.P., Barnhart, C.F.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 265 KB

english, 2003

4

Delay defect characteristics and testing strategies

Kee Sup Kim,, Mitra, S., Ryan, P.G.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 289 KB

english, 2003

5

Standards - Orthogonality of verilog data types and object kinds

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 203 KB

english, 2003

6

High-frequency, at-speed scan testing

Xijiang Lin,, Press, R., Rajski, J., Reuter, P., Rinderknecht, T., Swanson, B., Tamarapalli, N.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 293 KB

english, 2003

7

Wafer-package test mix for optimal defect detection and test time savings

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 308 KB

english, 2003

8

ARM twisting with Sir Robin: An interview with ARM chairman Sir Robin Saxby

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 218 KB

english, 2003

9

Achieving at-speed structural test

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 254 KB

english, 2003

10

Embedded deterministic test for low-cost manufacturing

Rajski, J., Kassab, M., Mukherjee, N., Tamarapalli, N., Tyszer, J., Jun Qian,

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 279 KB

english, 2003

11

Speed binning with path delay test in 150-nm technology

Cory, B.D., Kapur, R., Underwood, B.

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 232 KB

english, 2003