Volume 18; Issue 2

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IEEE Transactions on Computer-Aided Design of Integrated...
Volume 18; Issue 2

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volume 18; Issue 2

1

BDD minimization using symmetries

Scholl, C., Moller, D., Molitor, P., Drechsler, R.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 872 KB

english, 1999

2

Automatic synthesis of extended burst-mode circuits. I. (Specification and hazard-free implementations)

Yun, K.Y., Dill, D.L.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 798 KB

english, 1999

3

Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)

Yun, K.Y., Dill, D.L.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 690 KB

english, 1999

4

Error bound for reduced system model by Pade approximation via the Lanczos process

Zhaojun Bai, Slone, R.D., Smith, W.T., Qiang Ye

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 317 KB

english, 1999

5

Topological routing path search algorithm with incremental routability test

Hama, T., Etoh, H.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 192 KB

english, 1999

6

A DRC-based algorithm for extraction of critical areas for opens in large VLSI circuits

Pleskacz, W.A., Ouyang, C.H., Maly, W.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 580 KB

english, 1999

7

An improved optimal algorithm for bubble-sorting-based non-Manhattan channel routing

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 450 KB

english, 1999

8

Substrate optimization based on semi-analytical techniques

Charbon, E., Gharpurey, R., Meyer, R.G., Sangiovanni-Vincentelli, A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 837 KB

english, 1999

9

SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information

Corno, F., Glaser, U., Prinetto, P., Reorda, M.S., Vierhaus, H.T., Violante, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 269 KB

english, 1999

10

Scan-based BIST fault diagnosis

Yuejian Wu, Adham, S.M.I.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 263 KB

english, 1999

11

Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy

Garg, A., Le Coz, Y.L., Greub, H.J., Iverson, R.B., Philhower, R.F., Campbell, P.M., Maier, C.A., Steidl, S.A., Ernest, M.W., Kraft, R.P., Carlough, S.R., Perry, J.W., Krawczyk, T.W., McDonald, J.F.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 711 KB

english, 1999

12

On the design of optimal counter-based schemes for test set embedding

Kagaris, D., Tragoudas, S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 353 KB

english, 1999

13

On determining sensitization criterion in an iterative gate sizing process

How-Rern Lin, Ting Ting Hwang

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 228 KB

english, 1999

14

GLFSR-a new test pattern generator for built-in-self-test

Pradhan, D.K., Chatterjee, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 302 KB

english, 1999

15

Exterior templates for capacitance computations [interconnections]

Zemanian, A.H., Chang, V.A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 72 KB

english, 1999

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