IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

1

A BIST Scheme With the Ability of Diagnostic Data Compression for RAMs

Hou, Chih-Sheng, Li, Jin-Fu, Fu, Ting-Jun

Journal:

Year:

2014

Language:

english

File:

PDF, 92 KB

english, 2014

2

CASA: Contention-Aware Scratchpad Memory Allocation for Online Hybrid On-Chip Memory Management

Chang, Da-Wei, Lin, Ing-Chao, Chien, Yu-Shiang, Lin, Chin-Lun, Su, Alvin W.-Y., Young, Chung-Ping

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.80 MB

english, 2014

3

Static Test Compaction for Scan Circuits by Using Restoration to Modify and Remove Tests

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 947 KB

english, 2014

4

A Novel Built-In Self-Authentication Technique to Prevent Inserting Hardware Trojans

Xiao, Kan, Forte, Domenic, Tehranipoor, Mohammed

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.36 MB

english, 2014

5

Novel Techniques for High-Sensitivity Hardware Trojan Detection Using Thermal and Power Maps

Nowroz, Abdullah Nazma, Hu, Kangqiao, Koushanfar, Farinaz, Reda, Sherief

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.14 MB

english, 2014

6

2014 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 33

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 443 KB

english, 2014

7

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Hsu, Meng-Kai, Chen, Yi-Fang, Huang, Chau-Chin, Chou, Sheng, Lin, Tzu-Hen, Chen, Tung-Chieh, Chang, Yao-Wen

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.29 MB

english, 2014

8

Software-Based Self-Test for Small Caches in Microprocessors

Theodorou, Georgios, Kranitis, Nektarios, Paschalis, Antonis, Gizopoulos, Dimitris

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.93 MB

english, 2014

9

Efficient Multilayer Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Geometric Reduction

Liu, Chih-Hung, Lin, Chun-Xun, Chen, I-Che, Lee, D. T., Wang, Ting-Chi

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.53 MB

english, 2014

10

Out-of-Order Parallel Discrete Event Simulation for Transaction Level Models

Chen, Weiwei, Han, Xu, Chang, Che-Wei, Liu, Guantao, Domer, Rainer

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.98 MB

english, 2014

11

Formal Hardware/Software Co-Verification of Embedded Power Controllers

Dasgupta, Pallab, Srivas, Mandayam K., Mukherjee, Rajdeep

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 670 KB

english, 2014

12

Improving the Accuracy of Defect Diagnosis by Considering Fewer Tests

Pomeranz, Irith

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 549 KB

english, 2014

13

Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs

Banerjee, Kunal, Sarkar, Dipankar, Mandal, Chittaranjan

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 567 KB

english, 2014

14

High-Level Synthesis With Behavioral-Level Multicycle Path Analysis

Zheng, Hongbin, Gurumani, Swathi T., Yang, Liwei, Chen, Deming, Rupnow, Kyle

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.38 MB

english, 2014

15

Nonuniform Multilevel Analog Routing With Matching Constraints

Ou, Hung-Chih, Chien, Hsing-Chih Chang, Chang, Yao-Wen

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.68 MB

english, 2014

16

Silicon Effect-Aware Full-Chip Extraction and Mitigation of TSV-to-TSV Coupling

Peng, Yarui, Song, Taigon, Petranovic, Dusan, Lim, Sung Kyu

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 3.29 MB

english, 2014

17

Adapting an Implicit Path Delay Grading Method for Parallel Architectures

Lenox, Joseph, Tragoudas, Spyros

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 1.93 MB

english, 2014

18

Process-Variation Tolerant Channel-Adaptive Virtually Zero-Margin Low-Power Wireless Receiver Systems

Sen, Shreyas, Natarajan, Vishwanath, Devarakond, Shyam, Chatterjee, Abhijit

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 2.31 MB

english, 2014

19

Acknowledgment of Guest Editors

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

File:

PDF, 42 KB

2014

20