Volume 48; Issue 5

6

Charge transfer in a multi-implant pinned-buried photodetector

Year:
2001
Language:
english
File:
PDF, 130 KB
english, 2001
7

Bipolar transistor selected P-channel flash memory cell technology

Year:
2001
Language:
english
File:
PDF, 121 KB
english, 2001
9

Characteristics of p-channel Si nano-crystal memory

Year:
2001
Language:
english
File:
PDF, 157 KB
english, 2001
14

Analysis of the DCIV peaks in electrically stressed pMOSFETs

Year:
2001
Language:
english
File:
PDF, 221 KB
english, 2001
15

1/f noise in CMOS transistors for analog applications

Year:
2001
Language:
english
File:
PDF, 212 KB
english, 2001
21

On a dual-polarity on-chip electrostatic discharge protection structure

Year:
2001
Language:
english
File:
PDF, 156 KB
english, 2001
26

Patterning sub-30-nm MOSFET gate with i-line lithography

Year:
2001
Language:
english
File:
PDF, 84 KB
english, 2001
30

CMOS compatible HV gate-shifted LDD-NMOS

Year:
2001
Language:
english
File:
PDF, 93 KB
english, 2001
31

Reliability of thin oxides grown on deuterium implanted silicon substrate

Year:
2001
Language:
english
File:
PDF, 52 KB
english, 2001
32

The nonvolatile cell hidden in standard CMOS logic technologies

Year:
2001
Language:
english
File:
PDF, 70 KB
english, 2001
34

Changes in the editorial board

Year:
2001
Language:
english
File:
PDF, 14 KB
english, 2001