Zainalabedin, K.: search on Z-Library

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1

Compiling gate RC models into a top level simulation model for rough timing analysis of VLSI circuits

Zainalabedin Navabi

Journal:

Microprocessors and Microsystems

Year:

1991

Language:

english

File:

PDF, 723 KB

english, 1991

2

[IEEE Technology of Integrated Systems in Nanoscal Era (DTIS) - Cairo, Egypt (2009.04.6-2009.04.9)] 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era - TLM 2.0 simple sockets synthesis to RTL

Hatami, Nadereh, Ghofrani, Amirali, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2009

Language:

english

File:

PDF, 1.32 MB

english, 2009

3

Digital System Test and Testable Design ||

Navabi, Zainalabedin

Year:

2011

Language:

english

File:

PDF, 18.03 MB

english, 2011

4

[IEEE 2019 IEEE East-West Design & Test Symposium (EWDTS) - Batumi, Georgia (2019.9.13-2019.9.16)] 2019 IEEE East-West Design & Test Symposium (EWDTS) - Making System Level Test Possible by a Mixed-mode, Multi-level, Integrated Modeling Environment

Nosrati, Nooshin, Basharkhah, Katayoon, Sadeghi, Rezgar, Zivkovic, Carna, Grimm, Christoph, Navabi, Zainalabedin

Year:

2019

Language:

english

File:

PDF, 3.15 MB

english, 2019

5

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - A New Approach for Design and Verification of Transaction Level Models

Kakoee, Mohammad Reza, Shojaei, Hamid, Ghasemzadeh, Hassan, Sirjani, Marjan, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 360 KB

english, 2007

6

[Society of Petroleum Engineers Middle East Oil Show and Conference - Bahrain (1997-03-15)] Middle East Oil Show and Conference - A New Technique to Correct Slim Hole Through-Tubing Carbon-Oxygen Logs for Re-Invasion Effects, for Re-Invasion Effects

Al-Behair, A., Al-Hajari, A., Zainalabedin, K., Minh, C. Cao

File:

PDF, 502 KB

7

Self-Healing Many-Core Architecture: Analysis and Evaluation

Kamran, Arezoo, Navabi, Zainalabedin

Journal:

Year:

2016

Language:

english

File:

PDF, 2.11 MB

english, 2016

8

[IEEE 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Miami, FL, USA (2019.7.15-2019.7.17)] 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - An ESL Environment for Modeling Electrical Interconnect Faults

Nosrati, Nooshin, Basharkhah, Katayoon, Sadeghi, Rezgar, Navabi, Zainalabedin

Year:

2019

Language:

english

File:

PDF, 176 KB

english, 2019

9

LUT Input Reordering to Reduce Aging Impact on FPGA LUTs

Ebrahimi, Mohammad, Sadeghi, Rezgar, Navabi, Zainalabedin

Journal:

IEEE Transactions on Computers

Year:

2020

Language:

english

File:

PDF, 4.46 MB

english, 2020

10

[IEEE 2019 IEEE East-West Design & Test Symposium (EWDTS) - Batumi, Georgia (2019.9.13-2019.9.16)] 2019 IEEE East-West Design & Test Symposium (EWDTS) - From Abstract Modeling of ADAS Applications to an Accelerator-based Hardware Realization

Farsani, Samira Ahmadi, Basharkhah, Katayoon, Mohaghegh, Amin, Navabi, Zainalabedin

Year:

2019

File:

PDF, 3.54 MB

2019

11

Synthesis of VLSI circuits from behavioral descriptions

Zainalabedin Navabi, John Spillane

Journal:

Microelectronics Journal

Year:

1991

Language:

english

File:

PDF, 352 KB

english, 1991

12

A high-level language for design and modeling of hardware

Zainalabedin Navabi

Journal:

Journal of Systems and Software

Year:

1992

Language:

english

File:

PDF, 1.34 MB

english, 1992

13

Compiling an RT level hardware description language into layout of NMOS cells

Zainalabedin Navabi, Kia Doroudi

Journal:

Microprocessing and Microprogramming

Year:

1986

Language:

english

File:

PDF, 439 KB

english, 1986

14

Using RT Level Component Descriptions for Single Stuck-at Hierarchical Fault Simulation

Zainalabedin Navabi, Shahrzad Mirkhani, Meisam Lavasani, Fabrizio Lombardi

Journal:

Journal of Electronic Testing

Year:

2004

Language:

english

File:

PDF, 429 KB

english, 2004

15

A Test Approach for Look-Up Table Based FPGAs

Ehsan Atoofian, Zainalabedin Navabi

Journal:

Journal of Computer Science and Technology

Year:

2006

File:

PDF, 2.47 MB

2006

16

Generating gate level two phase dynamic MOS logic from AHPL

Zainalabedin Navabi

Journal:

Microprocessing and Microprogramming

Year:

1985

Language:

english

File:

PDF, 414 KB

english, 1985

17

Test access to deeply embedded analog terminals within an A/MS SoC

Asli Rahebeh Niaraki, Sattar Mirzakuchaki, Zainalabedin Navabi, Michel Renovell

Journal:

Journal of Zhejiang University SCIENCE A

Year:

2007

Language:

english

File:

PDF, 293 KB

english, 2007

18

A low-power high-throughput link splitting router for NoCs

Mohsen Saneei, Ali Afzali-Kusha, Zainalabedin Navabi

Journal:

Journal of Zhejiang University SCIENCE A

Year:

2008

Language:

english

File:

PDF, 226 KB

english, 2008

19

[IEEE 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) - Rome, Italy (2007.09.26-2007.09.28)] 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) - Online NoC Switch Fault Detection and Diagnosis Using a High Level Fault Model

Alaghi, Armin, Karimi, Naghmeh, Sedghi, Mahshid, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 463 KB

english, 2007

20

[IEEE 2012 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS) - Shiraz, Fars, Iran (2012.05.2-2012.05.3)] The 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS 2012) - Soft-error-immune communication network using unbalanced protection selection

Najafi, Mohammadreza, Ghandali, Samaneh, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 265 KB

english, 2012

21

[IEEE 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - Crete, Greece (2007.07.8-2007.07.11)] 13th IEEE International On-Line Testing Symposium (IOLTS 2007) - An Analytical Model for Reliability Evaluation of NoC Architectures

Dalirsani, Atefe, Hosseinabady, Mohammad, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 318 KB

english, 2007

22

A Selective Trigger Scan Architecture for VLSI Testing

Hosseinabady, Mohammad, Sharifi, Shervin, Lombardi, Fabrizio, Navabi, Zainalabedin

Journal:

IEEE Transactions on Computers

Year:

2008

Language:

english

File:

PDF, 3.63 MB

english, 2008

23

[IEEE 2012 21st Asian Test Symposium (ATS) - Niigata, Japan (2012.11.19-2012.11.22)] 2012 IEEE 21st Asian Test Symposium - A Probabilistic and Constraint Based Approach for Low Power Test Generation

Sabaghian-Bidgoli, Hossein, Namaki-Shoushtari, Majid, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 436 KB

english, 2012

24

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Enhanced TED: A New Data Structure for RTL Verification

Lotfi-Kamran, Pejman, Massoumi, Mehran, Mirzaei, Mohammad, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 1.50 MB

english, 2008

25

[IEEE 2008 Design, Automation and Test in Europe - Munich, Germany (2008.03.10-2008.03.14)] 2008 Design, Automation and Test in Europe - BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs

Lotfi-Kamran, Pejman, Daneshtalab, Masoud, Lucas, Caro, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 278 KB

english, 2008

26

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - Stall Power Reduction in Pipelined Architecture Processors

Lotfi-Kamran, Pejman, Rahmani, Amir-Mohammad, Salehpour, Ali-Asghar, Afzali-Kusha, Ali, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 1.21 MB

english, 2008

27

[IEEE 2011 IEEE 20th Asian Test Symposium (ATS) - New Delhi, India (2011.11.20-2011.11.23)] 2011 Asian Test Symposium - Adaptation of Standard RT Level BIST Architectures for System Level Communication Testing

Nemati, Nastaran, Navabi, Zainalabedin

Year:

2011

Language:

english

File:

PDF, 265 KB

english, 2011

28

[IEEE 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Tallinn, Estonia (2012.04.18-2012.04.20)] 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Effective RT-level software-based self-testing of embedded processor cores

Sha'afi Kabiri, Parisa, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 231 KB

english, 2012

29

[IEEE 21st International Conference on VLSI Design (VLSID 2008) - Hyderabad, India (2008.01.4-2008.01.8)] 21st International Conference on VLSI Design (VLSID 2008) - An NoC Test Strategy Based on Flooding with Power, Test Time and Coverage Considerations

Sedghi, Mahshid, Koopahi, Elnaz, Alaghi, Armin, Fathy, Mahmood, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 786 KB

english, 2008

30

[IEEE 2012 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2012.11.5-2012.11.8)] 2012 IEEE International Test Conference - BS 1149.1 extensions for an online interconnect fault detection and recovery

Sadeghi-Kohan, Somayeh, Namaki-Shoushtari, Majid, Javaheri, Fatemeh, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 435 KB

english, 2012

31

[IEEE 2010 IEEE International Test Conference (ITC) - Austin, TX, USA (2010.11.2-2010.11.4)] 2010 IEEE International Test Conference - Using context based methods for test data compression

Karamati, Sara, Navabi, Zainalabedin

Year:

2010

Language:

english

File:

PDF, 370 KB

english, 2010

32

[IEEE 2012 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS) - Shiraz, Fars, Iran (2012.05.2-2012.05.3)] The 16th CSI International Symposium on Computer Architecture and Digital Systems (CADS 2012) - BILBO-friendly hybrid BIST architecture with asymmetric polynomial reseeding

Sadredini, Elahe, Najafi, Mohammadreza, Fathy, Mahmood, Navabi, Zainalabedin

Year:

2012

Language:

english

File:

PDF, 158 KB

english, 2012

33

[IEEE 2011 IEEE 20th Asian Test Symposium (ATS) - New Delhi, India (2011.11.20-2011.11.23)] 2011 Asian Test Symposium - Mapping Transaction Level Faults to Stuck-At Faults in Communication Hardware

Javaheri, Fatemeh, Namaki-Shoushtari, Majid, Kamranfar, Parastoo, Navabi, Zainalabedin

Year:

2011

Language:

english

File:

PDF, 335 KB

english, 2011

34

[IEEE 2008 14th IEEE International On-Line Testing Symposium (IOLTS) - Rhodes, Greece (2008.07.7-2008.07.9)] 2008 14th IEEE International On-Line Testing Symposium - Reliability in Application Specific Mesh-Based NoC Architectures

Refan, Fatemeh, Alemzadeh, Homa, Safari, Saeed, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 629 KB

english, 2008

35

Evaluating the effect of low-level laser therapy on healing of tentomized Achilles tendon in streptozotocin-induced diabetic rats by light microscopical and gene expression examinations

Aliodoust, Morteza, Bayat, Mohammad, Jalili, Mohammad Reza, Sharifian, Zainalabedin, Dadpay, Masoomeh, Akbari, Mohammad, Bayat, Mehrnoush, Khoshvaghti, Amir, Bayat, Homa

Journal:

Lasers in Medical Science

Year:

2014

Language:

english

File:

PDF, 8.20 MB

english, 2014

36

A New Approach for Automatic Test Pattern Generation in Register Transfer Level Circuits

Mirzaei, Mohammad, Tabandeh, Mahmoud, Alizadeh, Bijan, Navabi, Zainalabedin

Journal:

IEEE Design and Test

Year:

2013

Language:

english

File:

PDF, 453 KB

english, 2013

37

[IEEE Technology of Integrated Systems in Nanoscal Era (DTIS) - Cairo, Egypt (2009.04.6-2009.04.9)] 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era - Design experience in TL modeling

Nemati, Nastaran, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2009

Language:

english

File:

PDF, 862 KB

english, 2009

38

[IEEE 2014 27th International Conference on VLSI Design - India (2014.01.5-2014.01.9)] 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems - Configurable Systolic Matrix Multiplication

Kamranfar, Parastoo, Shahabi, S. Ali, Vazhbakht, Ghazaleh, Navabi, Zainalabedin

Year:

2014

File:

PDF, 833 KB

2014

39

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - Reliable NoC architecture utilizing a robust rerouting algorithm

Alaghi, Armin, Sedghi, Mahshid, Karimi, Naghmeh, Fathy, Mahmood, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 963 KB

english, 2008

40

[IEEE 2014 15th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2014.03.3-2014.03.5)] Fifteenth International Symposium on Quality Electronic Design - Assertion-based verification for system-level designs

Sohofi, Hassan, Navabi, Zainalabedin

Year:

2014

Language:

english

File:

PDF, 528 KB

english, 2014

41

[IEEE 2006 International Conference on Microelectronics - Dhahran, Saudi Arabia (2006.12.16-2006.12.19)] 2006 International Conference on Microelectronics - Hot Block Ring Counter: A Low Power Synchronous Ring Counter

Dastjerdi-Mottaghi, Mohammad, Naghilou, Anahita, Daneshtalab, Masoud, Afzali-Kusha, Ali, Navabi, Zainalabedin

Year:

2006

Language:

english

File:

PDF, 3.29 MB

english, 2006

42

[Society of Petroleum Engineers Middle East Oil Show - Bahrain (2003-06-09)] Middle East Oil Show - Sour Crude Production Practices in Inhabited Onshore Saudi Arabian Field

Al-Dejain, A.A., Al-Ghamdi, A.A., Zainalabedin, _, Ahmad, G.

Language:

english

File:

PDF, 961 KB

english

43

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - An IEEE 1500 compatible wrapper architecture for testing cores at transaction level

Refan, Fatemeh, Prinetto, Paolo, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 349 KB

english, 2008

44

[IEEE Test Symposium (EWDTS) - St. Petersburg, Russia (2010.09.17-2010.09.20)] 2010 East-West Design & Test Symposium (EWDTS) - Near optimal machine learning based random test generation

Shakeri, Niki, Nemati, Nastaran, Ahmadabadi, Majid Nili, Navabi, Zainalabedin

Year:

2010

Language:

english

File:

PDF, 489 KB

english, 2010

45

[IEEE 2013 11th East-West Design and Test Symposium (EWDTS) - Rostov-on-Don, Russia (2013.09.27-2013.09.30)] East-West Design & Test Symposium (EWDTS 2013) - A new structure for interconnect offline testing

Sadeghi-Kohan, Somayeh, Keshavarz, Shahrzad, Zokaee, Farzaneh, Farahmandi, Farimah, Navabi, Zainalabedin

Year:

2013

Language:

english

File:

PDF, 134 KB

english, 2013

46

[IEEE 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Krakow, Poland (2007.04.11-2007.04.13)] 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - A HW/SW Architecture to Reduce the Effects of Soft-Errors in Real-Time Operating System Services

Neishaburi, M.H, Kakoee, Mohammad Reza, Daneshtalab, M., Safari, Saeed, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 266 KB

english, 2007

47

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - An advanced method for synthesizing TLM2-based interfaces

Hatami, Nadereh, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 497 KB

english, 2008

48

[IEEE 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) - Lubeck, Germany (2007.08.29-2007.08.31)] 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007) - On-Chip Verification of NoCs Using Assertion Processors

Kakoee, Mohammad Reza, Neishaburi, M.H, Daneshtalab, Masoud, Safari, Saeed, Navabi, Zainalabedin

Year:

2007

Language:

english

File:

PDF, 444 KB

english, 2007

49

[IEEE Test Symposium (EWDTS) - Lviv, Ukraine (2008.10.9-2008.10.12)] Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) - System level hardware design and simulation with SystemAda

Mahani, Negin, Mokri, Parnian, Navabi, Zainalabedin

Year:

2008

Language:

english

File:

PDF, 79 KB

english, 2008

50

[IEEE Test Symposium (EWDTS) - St. Petersburg, Russia (2010.09.17-2010.09.20)] 2010 East-West Design & Test Symposium (EWDTS) - A mixed HDL/PLI test package

Nemati, Nastaran, Namaki-Shoushtari, Majid, Navabi, Zainalabedin

Year:

2010

Language:

english

File:

PDF, 748 KB

english, 2010