IEEE Transactions on Very Large Scale Integration (VLSI) Systems

1

Concurrent Path Selection Algorithm in Statistical Timing Analysis

Chung, Jaeyong, Abraham, Jacob A.

Journal:

Year:

2013

Language:

english

File:

PDF, 1.41 MB

english, 2013

2

Predictive Techniques for Projecting Test Data Volume Compression

Saeed, Samah Mohamed, Sinanoglu, Ozgur, Almukhaizim, Sobeeh

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 250 KB

english, 2013

3

PWM Control Architecture With Constant Cycle Frequency Hopping and Phase Chopping for Spur-Free Operation in Buck Regulators

Tao, Chengwu, Fayed, Ayman A.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 5.23 MB

english, 2013

4

Efficient Shuffled Decoder Architecture for Nonbinary Quasi-Cyclic LDPC Codes

Lin, Jun, Yan, Zhiyuan

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 728 KB

english, 2013

5

Area Efficient ROM-Embedded SRAM Cache

Lee, Dongsoo, Roy, Kaushik

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.43 MB

english, 2013

6

Fast and Effective Placement Refinement for Routability

Zhang, Yanheng, Chu, Chris

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 539 KB

english, 2013

7

Fast Transient Low-Dropout Voltage Regulator With Hybrid Dynamic Biasing Technique for SoC Application

Chen, Chia-Min, Tsai, Tung-Wei, Hung, Chung-Chih

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.46 MB

english, 2013

8

RegularRoute: An Efficient Detailed Router Applying Regular Routing Patterns

Zhang, Yanheng, Chu, Chris

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 624 KB

english, 2013

9

Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic

Absel, Kalarikkal, Manuel, Lijo, Kavitha, R. K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 2.31 MB

english, 2013

10

Binary Multiplication Using Hybrid MOS and Multi-Gate Single-Electron Transistors

Deng, Guoqing, Chen, Chunhong

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 698 KB

english, 2013

11

Boostable Repeater Design for Variation Resilience in VLSI Interconnects

Shim, Kyu-Nam, Hu, Jiang

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.07 MB

english, 2013

12

Variable-Pipeline-Stage Router

Lee, Chun-Yi, Jha, Niraj K.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.94 MB

english, 2013

13

Low-Power Circuit Analysis and Design Based on Heterojunction Tunneling Transistors (HETTs)

Lee, Yoonmyung, Kim, Daeyeon, Cai, Jin, Lauer, Isaac, Chang, Leland, Koester, Steven J., Blaauw, David, Sylvester, Dennis

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.34 MB

english, 2013

14

Slew-Rate Monitoring Circuit for On-Chip Process Variation Detection

Ghosh, Amlan, Rao, Rahul M., Kim, Jae-Joon, Chuang, Ching-Te, Brown, Richard B.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 855 KB

english, 2013

15

Effects of Using Advanced Cooling Systems on the Overall Power Consumption of Processors

Park, Won Ho, Yang, Chih-Kong Ken

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2013

Language:

english

File:

PDF, 1.32 MB

english, 2013

16