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51

Gate-edge charges related effects and performance degradation in advanced multiple-gate MOSFETs

V. Kilchytska, J. Alvarado, N. Collaert, R. Rooyackers, S. Put, E. Simoen, C. Claeys, D. Flandre

Journal:

Solid-State Electronics

Year:

2011

Language:

english

File:

PDF, 579 KB

english, 2011

52

FD MOS SOI circuit to enhance the ratio of illuminated to dark current of a co-integrated a-Si:H photodiode

M. Estrada, A. Afzalian, D. Flandre, A. Cerdeira, H. Baez, A. de Lucca

Journal:

Microelectronics Reliability

Year:

2003

Language:

english

File:

PDF, 148 KB

english, 2003

53

0.25 μm fully depleted SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters

M Vanmackelberg, C Raynaud, O Faynot, J.-L Pelloie, C Tabone, A Grouillet, F Martin, G Dambrine, L Picheta, E Mackowiak, P Llinares, J Sevenhans, E Compagne, G Fletcher, D Flandre, V Dessard, D Vanhoe

Journal:

Solid-State Electronics

Year:

2002

Language:

english

File:

PDF, 547 KB

english, 2002

54

A review of leakage current in SOI CMOS ICs: impact on parametric testing techniques

Benjamı́n Iñı́guez, Jean-Pierre Raskin, Pascal Simon, Denis Flandre, Jaume Segura

Journal:

Solid-State Electronics

Year:

2003

Language:

english

File:

PDF, 177 KB

english, 2003

55

The breakdown behavior of the maximum likelihood estimator in the logistic regression model

Christophe Croux, Cécile Flandre, Gentiane Haesbroeck

Journal:

Statistics & Probability Letters

Year:

2002

Language:

english

File:

PDF, 145 KB

english, 2002

56

Harvesting the potential of nano-CMOS for lightweight cryptography: an ultra-low-voltage 65

Cédric Hocquet, Dina Kamel, Francesco Regazzoni, Jean-Didier Legat, Denis Flandre, David Bol, François-Xavier Standaert

Journal:

Journal of Cryptographic Engineering

Year:

2011

Language:

english

File:

PDF, 312 KB

english, 2011

57

Characterization of quantum efficiency, effective lifetime and mobility in thin film ungated SOI lateral PIN photodiodes

Aryan Afzalian, Denis Flandre

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 269 KB

english, 2007

58

Specific features of multiple-gate MOSFET threshold voltage and subthreshold slope behavior at high temperatures

V. Kilchytska, N. Collaert, M. Jurczak, D. Flandre

Journal:

Solid-State Electronics

Year:

2007

Language:

english

File:

PDF, 241 KB

english, 2007

59

Effect of high-energy neutrons on MuGFETs

V. Kilchytska, J. Alvarado, N. Collaert, R. Rooyakers, O. Militaru, G. Berger, D. Flandre

Journal:

Solid-State Electronics

Year:

2010

Language:

english

File:

PDF, 660 KB

english, 2010

60

Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channel

S. Burignat, D. Flandre, M.K. Md Arshad, V. Kilchytska, F. Andrieu, O. Faynot, J.-P. Raskin

Journal:

Solid-State Electronics

Year:

2010

Language:

english

File:

PDF, 981 KB

english, 2010

61

Large Sample Theory for Schemper's Measures of Explained Variation in the Cox Regression Model

John O’Quigley, Philippe Flandre, Ethan Reiner

Journal:

Journal of the Royal Statistical Society: Series D (The Statistician)

Year:

1999

Language:

english

File:

PDF, 190 KB

english, 1999

62

Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

D. Flandre, J. P. Colinge, J. Chen, D. De Ceuster, J. P. Eggermont, L. Ferreira, B. Gentinne, P. G. A. Jespers, A. Viviani, R. Gillon, J. P. Raskin, A. Vander Vorst, D. Vanhoenacker-Janvier, F. Silvei

Journal:

Analog Integrated Circuits and Signal Processing

Year:

1999

Language:

english

File:

PDF, 283 KB

english, 1999

63

[IEEE 1997 IEEE International SOI Conference Proceedings - Fish Camp, CA, USA (6-9 Oct. 1997)] 1997 IEEE International SOI Conference Proceedings - Comparison of charge injection in SOI and bulk MOS analog switches

Demeus, L., Flandre, D.

Year:

1997

Language:

english

File:

PDF, 187 KB

english, 1997

64

Characterization and modelling of single event transients in LDMOS-SOI FETs

J. Alvarado, V. Kilchytska, E. Boufouss, D. Flandre

Journal:

Microelectronics Reliability

Year:

2011

Language:

english

File:

PDF, 1.32 MB

english, 2011

65

High-energy neutrons effect on strained and non-strained SOI MuGFETs and planar MOSFETs

V. Kilchytska, J. Alvarado, S. Put, N. Collaert, E. Simoen, C. Claeys, O. Militaru, G. Berger, D. Flandre

Journal:

Microelectronics Reliability

Year:

2012

Language:

english

File:

PDF, 436 KB

english, 2012

66

Computational study of dopant segregated nanoscale Schottky barrier MOSFETs for steep slope, low SD-resistance and high on-current gate-modulated resonant tunneling FETs

A. Afzalian, D. Flandre

Journal:

Solid-State Electronics

Year:

2011

Language:

english

File:

PDF, 833 KB

english, 2011

67

Impact of self-heating and substrate effects on small-signal output conductance in UTBB SOI MOSFETs

S. Makovejev, J.-P. Raskin, M.K. Md Arshad, D. Flandre, S. Olsen, F. Andrieu, V. Kilchytska

Journal:

Solid-State Electronics

Year:

2012

Language:

english

File:

PDF, 924 KB

english, 2012

68

Ultra-thin body and thin-BOX SOI CMOS technology analog figures of merit

V. Kilchytska, M.K. Md Arshad, S. Makovejev, S. Olsen, F. Andrieu, T. Poiroux, O. Faynot, J.-P. Raskin, D. Flandre

Journal:

Solid-State Electronics

Year:

2012

Language:

english

File:

PDF, 1003 KB

english, 2012

69

A physically-based C∞-continuous fully-depleted SOI MOSFET model for analog applications

Iniguez, B., Ferreira, L.F., Gentinne, B., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

1996

Language:

english

File:

PDF, 837 KB

english, 1996

70

Deep-submicrometer DC-to-RF SOI MOSFET macro-model

Infguez, B., Raskin, J.-P., Demeus, L., Neve, A., Vanhoenacker, D., Simon, P., Goffioul, M., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2001

Language:

english

File:

PDF, 198 KB

english, 2001

71

A 3-D Analytical Physically Based Model for the Subthreshold Swing in Undoped Trigate FinFETs

Abd El Hamid, H., Guitart, J.R., Kilchytska, V., Flandre, D., Iniguez, B.

Journal:

IEEE Transactions on Electron Devices

Year:

2007

Language:

english

File:

PDF, 835 KB

english, 2007

72

On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part I—Effect of Gate-Voltage-Dependent Mobility

Rudenko, T., Kilchytska, V., Arshad, M.K.M., Raskin, J.-P., Nazarov, A., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2011

Language:

english

File:

PDF, 561 KB

english, 2011

73

On the MOSFET Threshold Voltage Extraction by Transconductance and Transconductance-to-Current Ratio Change Methods: Part II—Effect of Drain Voltage

Rudenko, T., Kilchytska, V., Arshad, M.K.M., Raskin, J.-P., Nazarov, A., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2011

Language:

english

File:

PDF, 789 KB

english, 2011

74

[IEEE 2006 25th International Conference on Microelectronics - Belgrade, Serbia and Montenegro (14-17 May 2006)] 2006 25th International Conference on Microelectronics - A Modified EKV PDSOI MOSFETs Model

Alvarado, J., Cerdeira, A., Kilshytska, V., Flandre, D.

Year:

2006

Language:

english

File:

PDF, 594 KB

english, 2006

75

[IEEE 2009 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT 2009) - Singapore (2009.01.9-2009.12.11)] 2009 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) - A very high efficiency ultra-low-power 13.56MHz voltage rectifier in 150nm SOI CMOS

Gosset, G., Flandre, D.

Year:

2009

Language:

english

File:

PDF, 292 KB

english, 2009

76

[IEEE 2009 European Conference on Radiation and Its Effects on Components and Systems (RADECS) - Brugge, Belgium (2009.09.14-2009.09.18)] 2009 European Conference on Radiation and Its Effects on Components and Systems - Efficient single event upset simulations of a tolerant PD SOI CMOS D Flip-Flop

Alvarado, J., Kilchytska, V., Berger, G., Flandre, D.

Year:

2009

Language:

english

File:

PDF, 289 KB

english, 2009

77

[IEEE 2012 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) - Playa del Carmen, Mexico (2012.03.14-2012.03.17)] 2012 8th International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) - Compact small-signal model for RF FinFETs

Alvarado, J., Tinoco, J. C., Kilchytska, V., Flandre, D., Raskin, J.-P., Cerdeira, A., Contreras, E.

Year:

2012

Language:

english

File:

PDF, 560 KB

english, 2012

78

Influence of device engineering on the analog and RF performances of SOI MOSFETs

Kilchytska, V., Neve, A., Vancaillie, L., Levacq, D., Adriaensen, S., van Meer, H., De Meyer, K., Raynaud, C., Dehan, M., Raskin, J.-P., Flandre, D.

Journal:

IEEE Transactions on Electron Devices

Year:

2003

Language:

english

File:

PDF, 981 KB

english, 2003

79

A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA

Silveira, F., Flandre, D., Jespers, P.G.A.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1996

Language:

english

File:

PDF, 647 KB

english, 1996

80

Integrated sensor and electronic circuits in fully depleted SOI technology for high-temperature applications

Demeus, L., Dessard, V., Viviani, A., Adriaensen, S., Flandre, D.

Journal:

IEEE Transactions on Industrial Electronics

Year:

2001

Language:

english

File:

PDF, 176 KB

english, 2001

81

[IEEE 2012 IEEE Subthreshold Microelectronics Conference (SubVT) - Waltham, MA, USA (2012.10.9-2012.10.10)] 2012 IEEE Subthreshold Microelectronics Conference (SubVT) - A dual-mode DC/DC converter for ultra-low-voltage microcontrollers

De Vos, Julien, Flandre, Denis, Bol, David

Year:

2012

Language:

english

File:

PDF, 181 KB

english, 2012

82

Quasi-double gate regime to boost UTBB SOI MOSFET performance in analog and sleep transistor applications

Kilchytska, V., Bol, D., De Vos, J., Andrieu, F., Flandre, D.

Journal:

Solid-State Electronics

Year:

2013

Language:

english

File:

PDF, 1.93 MB

english, 2013

83

Asymmetric channel doping profile and temperature reduction influence on the performance of current mirrors implemented with FD SOI nMOSFETs

de Souza, Michelly, Paz, Bruna Cardoso, Flandre, Denis, Pavanello, Marcelo Antonio

Journal:

Microelectronics Reliability

Year:

2013

Language:

english

File:

PDF, 720 KB

english, 2013

84

$g_{m}/I_{\rm d}$ Method for Threshold Voltage Extraction Applicable in Advanced MOSFETs With Nonlinear Behavior Above Threshold

Flandre, Denis, Kilchytska, Valeria, Rudenko, Tamara

Journal:

IEEE Electron Device Letters

Year:

2010

Language:

english

File:

PDF, 148 KB

english, 2010

85

[IEEE 2002 IEEE International Symposium on Circuits and Systems - Phoenix-Scottsdale, AZ, USA (26-29 May 2002)] 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) - A 110 nA pacemaker sensing channel in CMOS on silicon-on-insulator

Silveira, F., Flandre, D.

Year:

2002

Language:

english

File:

PDF, 380 KB

english, 2002

86

[IEEE 2011 12th International Conference on Ultimate Integration on Silicon (ULIS) - Cork, Ireland (2011.03.14-2011.03.16)] Ulis 2011 Ultimate Integration on Silicon - Influence of drain voltage on MOSFET threshold voltage determination by transconductance change and gm/Id methods

Rudenko, T., Kilchytska, V., Arshad, M. K. Md, Raskin, J.-P., Nazarov, A., Flandre, D.

Year:

2011

Language:

english

File:

PDF, 366 KB

english, 2011

87

[IEEE Comput. Soc 15th Symposium on Integrated Circuits and Systems Design - Porto Alegre, Brazil (9-14 Sept. 2002)] Proceedings. 15th Symposium on Integrated Circuits and Systems Design - Operational amplifier power optimization for a given total (slewing plus linear) settling time

Silveira, F., Flandre, D.

Year:

2002

Language:

english

File:

PDF, 307 KB

english, 2002

88

[IEEE 2008 IEEE International SOI Conference - New Paltz, NY (2008.10.6-2008.10.9)] 2008 IEEE International SOI Conference - Sub-45nm fully-depleted SOI CMOS subthreshold logic for ultra-low-power applications

Bol, D., Ambroise, R., Flandre, D., Legat, J.-D.

Year:

2008

Language:

english

File:

PDF, 115 KB

english, 2008

89

On the gm/ID-based approaches for threshold voltage extraction in advanced MOSFETs and their application to ultra-thin body SOI MOSFETs

Rudenko, T., Md Arshad, M.K., Raskin, J.-P., Nazarov, A., Flandre, D., Kilchytska, V.

Journal:

Solid-State Electronics

Year:

2014

Language:

english

File:

PDF, 1.33 MB

english, 2014

90

UTBB SOI MOSFETs analog figures of merit: Effects of ground plane and asymmetric double-gate regime

Md Arshad, M.K., Makovejev, S., Olsen, S., Andrieu, F., Raskin, J.-P., Flandre, D., Kilchytska, V.

Journal:

Solid-State Electronics

Year:

2013

Language:

english

File:

PDF, 1.45 MB

english, 2013

91

Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit

Md Arshad, M.K., Kilchytska, V., Emam, M., Andrieu, F., Flandre, D., Raskin, J.-P.

Journal:

Solid-State Electronics

Year:

2014

Language:

english

File:

PDF, 1.60 MB

english, 2014

92

[IEEE 2012 IEEE International SOI Conference - Napa, CA, USA (2012.10.1-2012.10.4)] 2012 IEEE International SOI Conference (SOI) - Quasi-double gate mode for sleep transistors in UTBB FD SOI low-power high-speed applications

Bol, David, Kilchytska, Valeriya, De Vos, Julien, Andrieu, Francois, Flandre, Denis

Year:

2012

Language:

english

File:

PDF, 812 KB

english, 2012

93

There always are more questions

DOUGLAS E. CRUIKSHANK and CHARLES de FLANDRE

Journal:

The Arithmetic Teacher

Year:

1971

Language:

english

File:

PDF, 645 KB

english, 1971

94

Understanding the limitations and improving the relevance of SPICE simulations in side-channel security evaluations

Kamel, Dina, Renauld, Mathieu, Flandre, Denis, Standaert, François-Xavier

Journal:

Journal of Cryptographic Engineering

Year:

2014

Language:

english

File:

PDF, 2.86 MB

english, 2014

95

[IEEE ESSCIRC 2004 - 29th European Solid-State Circuits Conference - Estoril, Portugal (16-18 Sept. 2003)] ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705) - MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design

Vancaillie, L., Silveira, F., Linares-Barranco, B., Serrano-Gotarredona, T., Flandre, D.

Year:

2003

Language:

english

File:

PDF, 283 KB

english, 2003

96

Dew-Based Wireless Mini Module for Respiratory Rate Monitoring

Andre, Nicolas, Druart, Sylvain, Dupuis, Pascal, Rue, Bertrand, Gerard, Pierre, Flandre, Denis, Raskin, Jean-Pierre, Francis, Laurent A.

Journal:

IEEE Sensors Journal

Year:

2012

Language:

english

File:

PDF, 1.32 MB

english, 2012

97

[IEEE 1995 IEEE International SOI Conference - Tucson, AZ, USA (3-5 Oct. 1995)] 1995 IEEE International SOI Conference Proceedings - A 1-GHz operational transconductance amplifier in SOI technology

Eggermont, J.P., Flandre, D., Gillon, R., Colinge, J.P.

Year:

1995

Language:

english

File:

PDF, 186 KB

english, 1995

98

On the Origin of the Excess Low-Frequency Noise in Graded-Channel Silicon-on-Insulator nMOSFETs

Simoen, Eddy, Claeys, C., Chung, T. M., Flandre, D., Raskin, J.-P.

Journal:

IEEE Electron Device Letters

Year:

2007

Language:

english

File:

PDF, 156 KB

english, 2007

99

[IEEE 1993 IEEE International SOI Conference - Palm Springs, CA, USA (5-7 Oct. 1993)] Proceedings of 1993 IEEE International SOI Conference - Subthreshold slope of accumulation-mode p-channel SOI MOSFETs

Colinge, J.P., van de Wiele, F., Flandre, D.

Year:

1993

Language:

english

File:

PDF, 131 KB

english, 1993

100

Measurement of threshold voltages of thin-film accumulation-mode PMOS/SOI transistors

Terao, A., Flandre, D., Lora-Tamayo, E., Van de Wiele, F.

Journal:

IEEE Electron Device Letters

Year:

1991

Language:

english

File:

PDF, 234 KB

english, 1991

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