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1

A simple freezing medium for serum-free cultured cells

Tadao Ohno, Kaoru Kurita, Shin-ichiro Abe, Naoko Eimori, Yoji Ikawa

Journal:

Year:

1988

Language:

english

File:

PDF, 211 KB

english, 1988

2

[IEEE IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest. - Tempe, Arizon, USA (Dec. 5, 2005)] IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest. - Vth-tunable CMIS platform with high-k gate dielectrics and variability effect for 45nm node

Hayashi,, Mizutani, M., Inoue, M., Yugami, J., Tsuchimoto, J., Anma, M., Komori, S., Tsukamoto, K., Tsukamoto, Y., Nii, K., Nishida, Y., Sayama, H., Yamashita, T., Oda, H., Eimori, T., Ohji, Y.

Year:

2005

Language:

english

File:

PDF, 857 KB

english, 2005

3

Dopant profiling of ultra shallow As implanted in Si with and without spike annealing using medium energy ion scattering

S. Abo, S. Ichihara, T. Lohner, F. Wakaya, T. Eimori, Y. Inoue, M. Takai

Journal:

Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms

Year:

2005

Language:

english

File:

PDF, 150 KB

english, 2005

4

Discrete Dopant Effects on Statistical Variation of Random Telegraph Signal Magnitude

Sonoda, K., Ishikawa, K., Eimori, T., Tsuchiya, O.

Journal:

IEEE Transactions on Electron Devices

Year:

2007

Language:

english

File:

PDF, 413 KB

english, 2007

5

Nickel-chemical vapour-deposited diamond interface studied by electron energy loss spectroscopy

Eimori, N., Mori, Y., Moon, J., Hatta, A., Ma, J.S., Ito, T., Hiraki, A.

Journal:

Diamond and Related Materials

Year:

1993

Language:

english

File:

PDF, 440 KB

english, 1993

6

Photoyield measurements of CVD diamond

Eimori, N., Mori, Y., Hatta, A., Ito, T., Hiraki, A.

Journal:

Diamond and Related Materials

Year:

1995

Language:

english

File:

PDF, 321 KB

english, 1995

7

[IEEE IEEE International Electron Devices Meeting - San Francisco, CA, USA (8-11 Dec. 2002)] Digest. International Electron Devices Meeting, - Novel locally strained channel technique for high performance 55nm CMOS

Ota, K., Sugihara, K., Sayama, H., Uchida, T., Oda, H., Eimori, T., Morimoto, H., Inoue, Y.

Year:

2002

Language:

english

File:

PDF, 222 KB

english, 2002

8

[Japan Soc. Appl. Phys Extended Abstracts of the Second International Workshop on Junction Technology - Tokyo, Japan (29-30 Nov. 2001)] Extended Abstracts of the Second International Workshop on Junction Technology. IWJT. (IEEE Cat.No.01EX541C) - Impact of STI stress on the junction characteristics

Shiozawa, K., Horita, K., Kuroi, T., Abe, Y., Eimori, T.

Year:

2001

Language:

english

File:

PDF, 237 KB

english, 2001

9

[IEEE Extended Abstracts of the Third International Workshop on Junction Technology. IWJT - Tokyo, Japan (2002.12.3-2002.12.3)] Extended Abstracts of the Third International Workshop on Junction Technology, 2002. IWJT. - 55nm gate CMOS technology using sub-keV ion implantation without through surface oxide

Sayama, H., Miyoshi, H., Kawasaki, Y., Ota, K., Oda, H., Kuroi, T., Eimori, T., Morimmo, H., Nakauka, H., Fuse, G., Nakanishi, K., Sebe, A., Kishimoto, T., Yamada, T., Kajiya, A., Mayumi, S.

Year:

2002

Language:

english

File:

PDF, 135 KB

english, 2002

10

Novel Shallow Trench Isolation Process from Viewpoint of Total Strain Process Design for 45 nm Node Devices and Beyond

Ishibashi, Masato, Horita, Katsuyuki, Sawada, Mahito, Kitazawa, Masashi, Igarashi, Motoshige, Kuroi, Takashi, Eimori, Takahisa, Kobayashi, Kiyoteru, Inuishi, Masahide, Ohji, Yuzuru

Journal:

Japanese Journal of Applied Physics

Year:

2005

Language:

english

File:

PDF, 158 KB

english, 2005

11

Suppression of Metamorphoses of Metal/High- k Gate Stack by Low-Temperature, Cl-Free SiN Offset Spacer, and Its Impact on Scaled Metal–Oxide–Semiconductor Field-Effect Transistors

Mise, Nobuyuki, Matsuki, Takeo, Watanabe, Toshinari, Morooka, Tetsu, Eimori, Takahisa, Nara, Yasuo

Journal:

Japanese Journal of Applied Physics

Year:

2008

File:

PDF, 703 KB

2008

12

Surface characteristics of synthesized diamond and the effect of surface treatment on surface transformations

Yusuke Mori, Nobuhiro Eimori, Jing Shing Ma, Toshimichi Ito, Akio Hiraki

Journal:

Applied Surface Science

Year:

1992

Language:

english

File:

PDF, 342 KB

english, 1992

13

Characterizations of metal/CVD diamond interface formation

Y. Mori, N. Eimori, J.S. Ma, T. Ito, A. Hiraki

Journal:

Applied Surface Science

Year:

1992

Language:

english

File:

PDF, 220 KB

english, 1992

14

Extraction of gate-edge workfunction of metal gate and its impact on scaled MOSFETs

N. Mise, T. Matsuki, T. Watanabe, T. Eimori, Y. Nara

Journal:

Microelectronic Engineering

Year:

2007

Language:

english

File:

PDF, 11.00 MB

english, 2007

15

Electron emitter device of NEA diamond thin film

Akimitsu Hatta, Kenji Ogawa, Nobuhiro Eimori, Masahiro Deguchi, Makoto Kitabatake, Toshimichi Ito, Akio Hiraki

Journal:

Applied Surface Science

Year:

1997

Language:

english

File:

PDF, 411 KB

english, 1997

16

A simple method forin situfreezing of anchorage-dependent cells including rat liver parenchymal cells

Tadao Ohno, Kaoru Saijo-Kurita, Naoko Miyamoto-Eimori, Tomoko Kurose, Yasunobu Aoki, Sigehiro Yosimura

Journal:

Year:

1991

Language:

english

File:

PDF, 340 KB

english, 1991

17

First report of Helleborus net necrosis virus isolated from hellebores with black death syndrome in Japan

Takuya Shiraishi, Hideo Hoshi, Koki Eimori, Takeshi Kawanishi, Ken Komatsu, Masayoshi Hashimoto, Kensaku Maejima, Yasuyuki Yamaji, Shigetou Namba

Journal:

Journal of General Plant Pathology

Year:

2011

Language:

english

File:

PDF, 274 KB

english, 2011

18

Approaches to extra low voltage DRAM operation by SOI-DRAM

Eimori, T., Oashi, T., Morishita, F., Iwamatsu, T., Yamaguchi, Y., Okuda, F., Shimomura, K., Shimano, H., Sakashita, N., Arimoto, K., Inoue, Y., Komori, S., Inuishi, M., Nishimura, T., Miyoshi, H.

Journal:

IEEE Transactions on Electron Devices

Year:

1998

Language:

english

File:

PDF, 398 KB

english, 1998

19

Compact modeling of a flash memory cell including substrate-bias-dependent hot-electron gate current

Sonoda, K., Tanizawa, M., Shimizu, S., Araki, Y., Kawai, S., Ogura, T., Kobayashi, S., Ishikawa, K., Eimori, T., Inoue, Y., Ohji, Y., Kotani, N.

Journal:

IEEE Transactions on Electron Devices

Year:

2004

Language:

english

File:

PDF, 346 KB

english, 2004

20

Proposal of Single Metal/Dual High- Devices for Aggressively Scaled CMISFETs With Precise Gate Profile Control

Mise, N., Morooka, T., Eimori, T., Ono, T., Sato, M., Kamiyama, S., Nara, Y., Ohji, Y.

Journal:

IEEE Transactions on Electron Devices

Year:

2009

Language:

english

File:

PDF, 1.00 MB

english, 2009

21

Ultralow-Thermal-Budget CMOS Process Using Flash-Lamp Annealing for 45 nm Metal/High- FETs

Ootsuka, F., Katakami, A., Shirai, K., Watanabe, T., Nakata, H., Kitajima, M., Aoyama, T., Eimori, T., Nara, Y., Ohji, Y., Tanjyo, M.

Journal:

IEEE Transactions on Electron Devices

Year:

2008

Language:

english

File:

PDF, 918 KB

english, 2008

22

Effect of ultraviolet light irradiation on CVD-grown (100) and (111) diamond surfaces

N. Eimori, Y. Mori, A. Hatta, T. Ito, A. Hiraki

Journal:

Surface Science

Year:

1996

Language:

english

File:

PDF, 277 KB

english, 1996

23

An experimental 256-Mb DRAM with boosted sense-ground scheme

Asakura, M., Ooishi, T., Tsukude, M., Tomishima, S., Eimori, T., Hidaka, H., Ohno, Y., Arimoto, K., Fujishima, K., Nishimura, T., Yoshihara, T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1994

Language:

english

File:

PDF, 655 KB

english, 1994

24

An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

Suma, K., Tsuruda, T., Hidaka, H., Eimori, T., Oashi, T., Yamaguchi, Y., Iwamatsu, T., Hirose, M., Morishita, F., Arimoto, K., Fujishima, K., Inoue, Y., Nishimura, T., Yoshihara, T.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1994

Language:

english

File:

PDF, 784 KB

english, 1994

25

A 1-V 46-ns 16-Mb SOI-DRAM with body control technique

Shimomura, K., Shimano, H., Sakashita, N., Okuda, F., Oashi, T., Yamaguchi, Y., Eimori, T., Inuishi, M., Arimoto, K., Maegawa, S., Inoue, Y., Komori, S., Kyuma, K.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1997

Language:

english

File:

PDF, 327 KB

english, 1997

26

Radiation damage and electrical properties of ion-implanted chemically vapour deposited diamond

Mori, Yusuke, Deguchi, Masahiro, Eimori, Nobuhiro, Ma, Jing Shing, Hatta, Akimitsu, Nishimura, Kazuhito, Kitabatake, Makoto, Ito, Toshimichi, Hirao, Takashi, Hiraki, Akio

Journal:

Diamond and Related Materials

Year:

1993

Language:

english

File:

PDF, 509 KB

english, 1993

27

[IEEE IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - San Francisco, CA, USA (Dec. 13-15, 2004)] IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - A 0.13μm MRAM with 0.26X0.44μm/sup 2/ MTJ optimized on universal MR-RA relation for 1.2V high-speed operation beyond 143MHz

Ueno, S., Eimori, T., Kuroiwa, T., Furuta, H., Tsuchimoto, J., Macjima, S., Iida, S., Ohshita, H., Hasegawa, S., Hirano, S., Yamaguchi, T., Kurisu, H., Ymani, A., Hashikawa, N., Maeda, H., Ogawa, Y.,

Year:

2004

Language:

english

File:

PDF, 218 KB

english, 2004

28

[IEEE ICMTS 2005. 2005 International Conference on Microelectronic Test Structures - Leuven, Belgium (4-7 April 2005)] Proceedings of the 2005 International Conference on Microelectronic Test Structures, 2005. ICMTS 2005. - A novel mobility-variation-free extraction technique of capacitance coupling coefficient for stacked flash memory cell

Okagaki, T., Tanizawa, M., Fujinaga, M., Kunikiyo, T., Yuki, H., Ishikawa, K., Nishikawa, Y., Eimori, T., Inuishi, M., Oji, Y.

Year:

2005

Language:

english

File:

PDF, 585 KB

english, 2005

29

[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Formation of S/D-extension using boron gas cluster ion beam doping for sub-50-nm PMOSFET

Yamashita, T., Hayashi, T., Nishida, Y., Kawasaki, Y., Kuroi, T., Oda, H., Eimori, T., Ohji, Y.

Year:

2005

Language:

english

File:

PDF, 727 KB

english, 2005

30

[IEEE 2008 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 2008) - Hakone-Machi, Kanagawa (2008.09.9-2008.09.11)] 2008 International Conference on Simulation of Semiconductor Processes and Devices - Monte Carlo investigation of potential fluctuation in 3D device structure

Ohkura, Y., Suzuki, C., Mise, N., Matsuki, T., Eimori, T., Nakamura, M.

Year:

2008

Language:

english

File:

PDF, 637 KB

english, 2008

31

[IEEE kshop on Junction Technology - Osaka, Japan (2005.06.7-2005.06.8)] Extended Abstracts of the Fifth International Workshop on Junction Technology - Advantages of B/sub 18/H/sub 22/ ion implantation and influence on PMOS reliability

Ishibashi, M., Kawasaki, Y., Horita, K., Kuroi, T., Yamashita, T., Shiga, K., Hayashi, T., Togawa, M., Eimori, T., Ohji, Y.

Year:

2005

Language:

english

File:

PDF, 1.44 MB

english, 2005

32

[IEEE 2008 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2008.12.15-2008.12.17)] 2008 IEEE International Electron Devices Meeting - Physical model of the PBTI and TDDB of la incorporated HfSiON gate dielectrics with pre-existing and stress-induced defects

Sato, M., Umezawa, N., Shimokawa, J., Arimura, H., Sugino, S., Tachibana, A., Nakamura, M., Mise, N., Kamiyama, S., Morooka, T., Eimori, T., Shiraishi, K., Yamabe, K., Watanabe, H., Yamada, K., Aoyama

Year:

2008

Language:

english

File:

PDF, 340 KB

english, 2008

33

[Japan Soc. Appl. Phys 1995 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (6-8 June 1995)] 1995 Symposium on VLSI Technology. Digest of Technical Papers - Leakage mechanism due to floating body and countermeasure on dynamic retention mode of SOI-DRAM

Morishita, F., Suma, K., Hirose, M., Tsuruda, T., Yamaguchi, Y., Eimori, T., Oashi, T., Arimoto, K., Inoue, Y., Nishimura, T.

Year:

1995

Language:

english

File:

PDF, 253 KB

english, 1995

34

[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Impact of boron penetration from S/D-extension on gate-oxide reliability for 65-nm node CMOS and beyond

Yamashita, T., Ota, K., Shiga, K., Hayashi, T., Umeda, H., Oda, H., Eimori, T., Inuishi, M., Ohji, Y., Eriguchi, K., Nakanishi, K., Nakaoka, H., Yamada, T., Nakamura, M., Miyanaga, I., Kajiya, A., Kub

Year:

2004

Language:

english

File:

PDF, 187 KB

english, 2004

35

[IEEE Extended Abstracts of the Fourth International Workshop on Junction Technology - Shanghai, China (15-16 March 2004)] The Fourth International Workshop on Junction Technology, 2004. IWJT '04. - Ultra-shallow arsenic profiling using enhanced depth-resolution analysis technique with medium energy ion scattering

Takai, M., Ichihara, S., Abo, S., Wakaya, F., Sayama, H., Eimori, T., Inoue, Y.

Year:

2004

Language:

english

File:

PDF, 266 KB

english, 2004

36

[IEEE 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Honolulu, HI, USA (June 13-15, 2006)] 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers. - Performance Enhancement in 45-nm Ni Fully-Silicided Gate/High-k CMIS Using Substrate Ion Implantation

Nishida, Y., Yamashita, T., Yamanari, S., Higashi, M., Shiga, K., Murata, N., Mizutani, M., Inoue, M., Sakashita, S., Mori, K., Yugami, J., Hayashi, T., Shimizu, A., Oda, H., Eimori, T., Tsuchiya, O.

Year:

2006

Language:

english

File:

PDF, 314 KB

english, 2006

37

[IEEE 2002 Symposium on VLSI Technology Digest of Technical Papers - Honolulu, HI, USA (11-13 June 2002)] 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) - A novel bi-layer cobalt silicide process with nitrogen implantation for sub-50 nm CMOS and beyond

Itonaga, K., Eriguchi, K., Miyanaga, I., Kajiya, A., Ogura, M., Tsutsumi, T., Sayama, H., Oda, H., Eimori, T., Morimoto, H.

Year:

2002

Language:

english

File:

PDF, 255 KB

english, 2002

38

[IEEE IEEE International Solid-State Circuits Conference - ISSCC '94 - San Francisco, CA, USA (16-18 Feb. 1994)] Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94 - An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

Suma, K., Tsuruda, T., Hidaka, H., Eimori, T., Oashi, T., Yamaguchi, Y., Iwamatsu, T., Hirose, M., Fujishima, K., Inoue, Y., Nishimura, T., Yoshihara, T.

Year:

1994

Language:

english

File:

PDF, 308 KB

english, 1994

39

[IEEE IEEE International Electron Devices Meeting - San Francisco, CA, USA (8-11 Dec. 2002)] Digest. International Electron Devices Meeting, - Novel low offset voltage diode using asymmetric threshold voltage MONOS-FET for next generation devices demanding low voltage operation

Ueno, S., Furuta, H., Okumura, Y., Eimori, T., Inoue, Y.

Year:

2002

Language:

english

File:

PDF, 190 KB

english, 2002

40

[IEEE 2007 IEEE International Electron Devices Meeting - Washington, DC, USA (2007.12.10-2007.12.12)] 2007 IEEE International Electron Devices Meeting - Single Metal/Dual High-k Gate Stack with Low Vth and Precise Gate Profile Control for Highly Manufacturable Aggressively Scaled CMISFETs

Mise, N., Morooka, T., Eimori, T., Kamiyama, S., Murayama, K., Sato, M., Ono, T., Nara, Y., Ohji, Y.

Year:

2007

Language:

english

File:

PDF, 3.51 MB

english, 2007

41

[IEEE Technical Digest., International Electron Devices Meeting - San Francisco, CA, USA (11-14 Dec. 1988)] Technical Digest., International Electron Devices Meeting - Fully planarized 0.5 mu m technologies for 16-Mb DRAM

Wakamiya, W., Eimori, T., Ozaki, H., Itoh, H., Fujiwara, K., Shibano, T., Miyatake, H., Fujii, A., Tsutsumi, T., Satoh, S., Katoh, T.

Year:

1988

File:

PDF, 417 KB

1988

42

[IEEE 2002 Symposium on VLSI Technology Digest of Technical Papers - Honolulu, HI, USA (11-13 June 2002)] 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) - Sub-1 μm/sup 2/ high density embedded SRAM technologies for 100 nm generation SOC and beyond

Tomita, K., Hashimoto, K., Inbe, T., Oashi, T., Tsukamoto, K., Nishioka, Y., Matsuura, M., Eimori, T., Inuishi, M., Miyanaga, I., Nakamura, M., Kishimoto, T., Yamada, T., Eriguchi, K., Yuasa, H., Sata

Year:

2002

Language:

english

File:

PDF, 273 KB

english, 2002

43

[IEEE International Meeting for Future of Electron Devices, 2004. - Kyoto, Japan (July 26-28, 2004)] International Meeting for Future of Electron Devices, 2004. - Impact of boron penetration from s/-extension on gate leakage current and gate-oxide reliablity for 65-nmnode CMOS and beyond

Yamashita, T., Shiga, K., Hayashi, T., Umeda, H., Oda, H., Eimori, T., Inuishi, M., Ohji, Y., Eriguchi, K., Nakanishi, K., Nakaoka, H., Yamada, T., Nakamura, M., Miyanaga, I., Kajiya, A., Kubota, M.,

Year:

2004

Language:

english

File:

PDF, 1.65 MB

english, 2004

44

[IEEE 2006 International Conference on Simulation of Semiconductor Processes and Devices - Monterey, CA, USA (2006.09.6-2006.09.8)] 2006 International Conference on Simulation of Semiconductor Processes and Devices - Global Identification of Variability Factors and Its Application to the Statistical Worst-Case Model Generation

Eikyu, Katsumi, Okagaki, Takeshi, Tanizawa, Motoaki, Ishikawa, Kiyoshi, Eimori, Takahisa, Tsuchiya, Osamu

Year:

2006

Language:

english

File:

PDF, 3.07 MB

english, 2006

45

[IEEE 2005 International Conference On Simulation of Semiconductor Processes and Devices - Tokyo, Japan (2005.09.3-2005.09.3)] 2005 International Conference On Simulation of Semiconductor Processes and Devices - Compact Modeling of Source-Side Injection Programming for 9Onm-Node AG-AND Flash Memory

Sonoda, K., Narumi, S., Tanizawa, M., Ishikawa, K., Eimori, T., Ohji, Y., Kurata, H.

Year:

2005

Language:

english

File:

PDF, 617 KB

english, 2005

46

[IEEE ICMTS 93 1993 International Conference on Microelectronic Test Structures - Sitges, Spain (22-25 March 1993)] ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures - Junction evaluation by time dependent degradation due to high constant voltage stressing (DRAMs)

Mitsuhashi, J., Komori, J., Eimori, T., Koyama, H.

Year:

1992

Language:

english

File:

PDF, 253 KB

english, 1992

47

[IEEE 2008 Symposium on VLSI Technology - Honolulu, HI, USA (2008.06.17-2008.06.19)] 2008 Symposium on VLSI Technology - Physical understanding of the reliability improvement of dual high-k CMOSFETs with the fifth element incorporation into HfSiON gate dielectrics

Sato, M., Umezawa, N., Mise, N., Kamiyama, S., Kadoshima, M., Morooka, T., Adachi, T., Chikyow, T., Yamabe, K., Shiraishi, K., Miyazaki, S., Uedono, A., Yamada, K., Aoyama, T., Eimori, T., Nara, Y., O

Year:

2008

Language:

english

File:

PDF, 483 KB

english, 2008

48

[IEEE IEEE International Electron Devices Meeting - Washington, DC, USA (5-8 Dec. 1993)] Proceedings of IEEE International Electron Devices Meeting - A newly designed planar stacked capacitor cell with high dielectric constant film for 256 Mbit DRAM

Eimori, T., Ohno, Y., Kimura, H., Matsufusa, J., Kishimura, S., Yoshida, A., Sumitani, H., Maruyama, T., Hayashide, Y., Moriizumi, K., Katayama, T., Asakura, M., Horikawa, T., Shibano, T., Itoh, H., S

Year:

1993

Language:

english

File:

PDF, 355 KB

english, 1993

49

[IEEE IEEE International Electron Devices Meeting - Washington, DC, USA (5-8 Dec. 1993)] Proceedings of IEEE International Electron Devices Meeting - ULSI DRAM/SIMOX with stacked capacitor cells for low-voltage operation

Eimori, T., Oashi, T., Kimura, H., Yamaguchi, Y., Iwamatsu, T., Tsuruda, T., Suma, M., Hidaka, H., Inoue, Y., Nishimura, T., Satoh, S., Miyoshi, H.

Year:

1993

Language:

english

File:

PDF, 350 KB

english, 1993

50

[IEEE 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT) - Beijing, China (2008.10.20-2008.10.23)] 2008 9th International Conference on Solid-State and Integrated-Circuit Technology - Gate-first high-k/metal gate stack for advanced CMOS technology

Nara, Y., Mise, N., Kadoshima, M., Morooka, T., Kamiyama, S., Matsuki, T., Sato, M., Ono, T., Aoyama, T., Eimori, T., Ohji, Y.

Year:

2008

Language:

english

File:

PDF, 2.16 MB

english, 2008